EPC448JC-30A vs EPC2LC20 Perbandingan

Perbandingan bersamaan detil EPC448JC-30A dari Altera dan EPC2LC20 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC448JC-30A EPC2LC20
Merek Altera Altera
Kategori FPGA & CPLD Memory ICs
Status Lingkungan Hidup NRND NRND
Harga Unit (USD) — $7,20
Memory Density 4 Mbit —
Device Family Enhanced Configuration Device —
Supply Voltage (VCC) 3.3 V nominal —
Operating Voltage Range 3.0 V to 3.6 V —
Access Time 30 ns —
Configuration Interface Altera serial (DCLK + DATA0) and JTAG ISP Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE
Package Type PLCC-32 (JC) —
Jumlah Pin 32 —
Tipe Mounting Surface Mount / Socket Surface Mount
Suhu Kerja 0 C to +70 C -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet]
Programmability IEEE 1532 JTAG In-System Programmable —
Compatibility FLEX, APEX, ACEX, Cyclone, Stratix FPGAs —
Lead-Free / RoHS [DATA_NEEDED: lead-free / RoHS status] —
AEC-Q100 Qualification Not Qualified —
Configuration Control Pins nSTATUS, nCONFIG, CONF_DONE —
Tipe Memori — Non-volatile configuration PROM
Ukuran Memori — 1.6 Mbit
Programming Interface — IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant
Supply Voltage VCC — 3.0 V to 3.6 V (3.3-V operation)
ISP Voltage Range — 5.0 V or 3.3 V
Supported FPGA Families — ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000
Cascade Support — Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams
Paket — 20-pin PLCC (J-lead, 9x9 mm)
Status RoHS — Non-Compliant (original Altera Pb-containing part)
Lead-Free Version — EPC2LC20N available as lead-free equivalent
Programming Support — Altera Programming Unit (APU), Quartus II, JTAG programmer
Boundary-Scan — IEEE 1149.1 compliant, 8-bit or 16-bit JTAG

Spek dan Sumber

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