EPM3064ATC44-10 vs EPM3064ATC44-10N Perbandingan
Perbandingan bersamaan detil EPM3064ATC44-10 dari Altera dan EPM3064ATC44-10N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM3064ATC44-10 | EPM3064ATC44-10N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Aktif |
| Family | MAX 3000A | MAX 3000A |
| Logic Elements / Macrocells | 64 macrocells | — |
| Usable Gates | 1,250 | 1250 |
| Number of Logic Blocks / LABs | 4 LABs | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 227.3 MHz (counter speed) | — |
| Programmable I/Os | 34 | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | 3.3 V |
| I/O Bank Voltage (VCCIO) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Technology | CMOS EEPROM, 5 V tolerant I/O | — |
| In-System Programming | IEEE Std. 1532 (JTAG) | IEEE Std. 1532 compliant |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| Paket | TQFP-44, 10 x 10 mm, 0.8 mm pitch | TQFP-44 (10x10 mm) |
| Tipe Mounting | Surface Mount | Surface Mount |
| Rentang Suhu Kerja | 0C to +70C (commercial) | — |
| Status RoHS | Non-compliant (legacy Altera, Pb-bearing) | Compliant |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 64 |
| User I/O Pins | — | 34 |
| Logic Array Blocks (LABs) | — | 4 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 192.3 MHz |
| I/O Standard | — | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) compliant |
| Suhu Kerja | — | 0C to +70C (commercial) |
| Pin-Locking | — | Yes (across design iterations) |