EPM3512AFC256-20 vs EPM3512AFC256-19 Perbandingan

Perbandingan bersamaan detil EPM3512AFC256-20 dari Altera dan EPM3512AFC256-19 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM3512AFC256-20 EPM3512AFC256-19
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Family MAX 3000A MAX 3000A
Macrocells 512 512
Typical Usable Gates 10,000 —
Speed Grade -20 (20 ns tPD) -19
Paket 256-ball FBGA (Fine-pitch BGA) 256-ball FineLine BGA (FC)
Jumlah Pin 256 —
Operating Voltage (VCCINT) 3.3 V (3.0 V to 3.6 V) —
I/O Voltage (VCCIO) 2.5 V or 3.3 V (5.0 V tolerant inputs) —
I/O Standards LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant —
Program Memory Type EEPROM (non-volatile) —
In-System Programmability Yes (JTAG IEEE 1149.1) —
JTAG Support Yes (boundary-scan + ISP) —
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Level MSL [DATA_NEEDED: MSL moisture sensitivity level] —
Configuration Memory Internal EEPROM —
Device Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 10000
Logic Array Blocks (LABs) — 16
Maximum Operating Frequency — 80 MHz
Pin-to-Pin Delay (tPD) — 7.5 ns
User I/O Pins — 208
Supply Voltage VCCINT — 3.3 V
I/O Supply Voltage VCCIO — 2.5 V or 3.3 V (5.0 V tolerant inputs)
Programming Interface — JTAG (IEEE 1149.1) / ISP (IEEE 1532)
Process Technology — 0.30 µm CMOS EEPROM
Non-volatile Configuration — Yes (EEPROM-based)

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