EPM3512AFC256-20 vs EPM3512AFC256-19 Comparison

Detailed side-by-side comparison of EPM3512AFC256-20 by Altera and EPM3512AFC256-19 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-20 EPM3512AFC256-19
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.75 $10.85
Family MAX 3000A MAX 3000A
Macrocells 512 512
Typical Usable Gates 10,000 β€”
Speed Grade -20 (20 ns tPD) -19
Package 256-ball FBGA (Fine-pitch BGA) 256-ball FineLine BGA (FC)
Pin Count 256 β€”
Operating Voltage (VCCINT) 3.3 V (3.0 V to 3.6 V) β€”
I/O Voltage (VCCIO) 2.5 V or 3.3 V (5.0 V tolerant inputs) β€”
I/O Standards LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant β€”
Program Memory Type EEPROM (non-volatile) β€”
In-System Programmability Yes (JTAG IEEE 1149.1) β€”
JTAG Support Yes (boundary-scan + ISP) β€”
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
MSL Level [DATA_NEEDED: MSL moisture sensitivity level] β€”
Configuration Memory Internal EEPROM β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Usable Gates β€” 10000
Logic Array Blocks (LABs) β€” 16
Maximum Operating Frequency β€” 80 MHz
Pin-to-Pin Delay (tPD) β€” 7.5 ns
User I/O Pins β€” 208
Supply Voltage VCCINT β€” 3.3 V
I/O Supply Voltage VCCIO β€” 2.5 V or 3.3 V (5.0 V tolerant inputs)
Programming Interface β€” JTAG (IEEE 1149.1) / ISP (IEEE 1532)
Process Technology β€” 0.30 Β΅m CMOS EEPROM
Non-volatile Configuration β€” Yes (EEPROM-based)

Datasheets & Resources

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