EPM5064JC1 vs EPM5064LC Perbandingan

Perbandingan bersamaan detil EPM5064JC1 dari Altera dan EPM5064LC dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5064JC1 EPM5064LC
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000
Device Type CPLD / EPLD (Erasable PLD) CPLD (Complex Programmable Logic Device)
Macrocells 64 —
Logic Array Blocks (LABs) 4 4
Usable Gates 1.25K 1.25K
Maximum Operating Frequency (fCNT) 62.5 MHz —
External Clock Input (max) 50 MHz —
I/O Pins 28 28 bidirectional + 4 dedicated input
Dedicated Inputs 7 —
Total Inputs 36 (28 I/O + 7 dedicated + 1 clock) 36 (7 dedicated + 29 I/O)
Operating Voltage (VCC) 5 V —
Program Type EPROM (one-time programmable, UV-erasable) —
Process Technology CMOS CMOS EPROM
Paket 44-pin PLCC (J-Lead) PLCC-44 (LCC-44, J-lead)
Operating Temperature (JC suffix) 0°C to +70°C (commercial) —
Supply Current (ICC) [DATA_NEEDED: ICC maximum] —
Status RoHS unknown [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant]
Lead-Free Status unknown —
Programming Type — OTP (One-Time-Programmable, UV-erasable EPROM)
Macro Cells — 64
Propagation Delay (tPD) — 55 ns
Supply Voltage (VCC) — 4.75 V to 5.25 V
Suhu Kerja — 0C to +70C (Commercial)
Tipe Mounting — Surface Mount
Lead Free — [DATA_NEEDED: lead-free status]

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