EPM5130WC-2 vs EPM5130QC-1 Perbandingan

Perbandingan bersamaan detil EPM5130WC-2 dari Altera dan EPM5130QC-1 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5130WC-2 EPM5130QC-1
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Device Family MAX 5000 —
Product Type UV-Erasable PLD (CPLD) UV-Erasable / OTP Complex PLD (CPLD)
Macrocell Count 128 —
Propagation Delay (tPD) 45 ns —
Supply Voltage (VCC) 4.75 V to 5.25 V —
Suhu Kerja 0 °C to 70 °C (Commercial) Commercial (0 C to +70 C)
Process Technology CMOS CMOS
Dedicated Inputs 19 —
User I/O Lines 48 —
Total Inputs (I/O + dedicated) 68 —
Package Type 100-terminal Ceramic CQFP (R-CQFP-G100), windowed, gull-wing —
Terminal Pitch 0.650 mm 0.635 mm
Tipe Mounting Surface Mount Surface Mount
Configuration Memory UV-erasable CMOS EEPROM cells UV-Erasable EPROM
Speed Grade -2 (45 ns) -1
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Lead-Free [DATA_NEEDED: lead-free status] —
Logic Elements AND/OR array with programmable macrocell register —
Family — MAX 5000
Logic Cells / Macrocells — 128 macrocells
Usable Gates (marketing) — 5130 gates
Paket — PQFP-100 (windowed ceramic)
Tegangan Pemuat — 5 V (single)
Programmable Polarity — Yes (per macrocell)
Boundary Scan / JTAG — Per MAX 5000 family

Spek dan Sumber

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