EPM5192AJI84-15 vs EPM5192AJC84-15 Perbandingan

Perbandingan bersamaan detil EPM5192AJI84-15 dari Altera dan EPM5192AJC84-15 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5192AJI84-15 EPM5192AJC84-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Device Family MAX 5000 EPLD —
Product Type UV-Erasable / OTP Complex PLD —
Macrocells 192 192
Logic Array Blocks (LABs) 16 —
User I/O Pins 84 —
Propagation Delay (tPD) 15 ns —
Supply Voltage (VCC) 4.5 V to 5.5 V (nominal 5 V) 5 V (single supply)
Process Technology CMOS EPROM (UV-erasable) CMOS EPROM
Package Type 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window —
Tipe Mounting Through-Hole (SMD socket-compatible) Surface Mount
Suhu Kerja -40 °C to +85 °C (Industrial, 'I' suffix) [DATA_NEEDED: commercial/industrial/military grade]
Programming Method UV erase + EPROM program via standard Altera programmer UV-erase + EPROM programming (windowed package)
Design Tool Support MAX+PLUS II (legacy); not supported by modern Quartus Prime —
Status RoHS unknown Non-compliant (contains Pb, ceramic windowed package)
Lead-Free unknown —
Bebas Halogen unknown —
Functional Equivalent (Plastic OTP) EPM5192AJC84-15 (windowless plastic JLCC, same die) —
Family — MAX 5000
Device Type — EPLD (Erasable Programmable Logic Device)
Propagation Delay (tpd) — 15 ns
Maximum Clock Frequency (fMAX) — 83.3 MHz
Technology — CMOS, UV-erasable EPROM
Paket — 84-pin PLCC (J84C) windowed ceramic
Logic Blocks — 16 Logic Array Blocks (LABs)
I/O Pins — [DATA_NEEDED: user I/O count]

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