EPM5192JC-ES vs EPM5192GI Perbandingan

Perbandingan bersamaan detil EPM5192JC-ES dari Intel dan EPM5192GI dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5192JC-ES EPM5192GI
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Device Family MAX 5000 —
Device Type CPLD (EPLD) CPLD (Complex Programmable Logic Device)
Macrocells 192 192
Logic Array Blocks (LABs) 12 16 (12 macrocells per LAB)
Interconnect Programmable Interconnect Array (PIA) —
Configuration Memory EPROM (UV-erasable, one-time programmable for JC-ES) —
Paket 84-pin PLCC (J-lead, CQCC, JEDEC S-CQCC-J84) —
Tipe Mounting Surface Mount Through-hole (PGA)
Technology CMOS CMOS EPROM (UV-erasable / OTP)
Programming Altera MAX+PLUS II or compatible programmer —
Suhu Kerja [DATA_NEEDED: operating temperature range for ES grade] -40 C to +85 C (Industrial)
Tegangan Pemuat [DATA_NEEDED: VCC nominal] —
User I/O Pins [DATA_NEEDED: user I/O count for JC-ES in PLCC-84] 64
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: not confirmed in verified web data]
Lead-Free [DATA_NEEDED: lead-free status] —
Level MSL [DATA_NEEDED: MSL rating] —
Note Datasheet source: Altera MAX 5000 family document, 52 pages —
Family — MAX 5000
Dedicated Inputs — 7
Total Inputs — 72
Propagation Delay (tPD) — 55 ns
Maximum Internal Frequency (fCNT) — 33.3 MHz
Supply Voltage (VCC) — 4.5 V to 5.5 V (nominal 5 V)
Package Type — 84-pin PGA (Pin Grid Array), ceramic with quartz window
Programmable — UV-erasable (windowed) and OTP variants

Spek dan Sumber

Buka Semua Produk Buat BOM Ajukan Diskon