EPM5192JC-ES vs EPM5192GI Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192JC-ES disebabkan oleh Intel dan EPM5192GI disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192JC-ES EPM5192GI
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Device Family MAX 5000 —
Device Type CPLD (EPLD) CPLD (Complex Programmable Logic Device)
Macrocells 192 192
Logic Array Blocks (LABs) 12 16 (12 macrocells per LAB)
Interconnect Programmable Interconnect Array (PIA) —
Configuration Memory EPROM (UV-erasable, one-time programmable for JC-ES) —
Kemasan 84-pin PLCC (J-lead, CQCC, JEDEC S-CQCC-J84) —
Jenis Pemasangan Surface Mount Through-hole (PGA)
Technology CMOS CMOS EPROM (UV-erasable / OTP)
Programming Altera MAX+PLUS II or compatible programmer —
Suhu Operasi [DATA_NEEDED: operating temperature range for ES grade] -40 C to +85 C (Industrial)
Tegangan Pemberi Arus [DATA_NEEDED: VCC nominal] —
User I/O Pins [DATA_NEEDED: user I/O count for JC-ES in PLCC-84] 64
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: not confirmed in verified web data]
Lead-Free [DATA_NEEDED: lead-free status] —
Aras MSL [DATA_NEEDED: MSL rating] —
Note Datasheet source: Altera MAX 5000 family document, 52 pages —
Family — MAX 5000
Dedicated Inputs — 7
Total Inputs — 72
Propagation Delay (tPD) — 55 ns
Maximum Internal Frequency (fCNT) — 33.3 MHz
Supply Voltage (VCC) — 4.5 V to 5.5 V (nominal 5 V)
Package Type — 84-pin PGA (Pin Grid Array), ceramic with quartz window
Programmable — UV-erasable (windowed) and OTP variants

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