EPM5192LC-25 vs EPM5192LC-M205A Perbandingan
Perbandingan bersamaan detil EPM5192LC-25 dari Altera dan EPM5192LC-M205A dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM5192LC-25 | EPM5192LC-M205A |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Elements | 192 (1 macrocell ≈ 1 LE in MAX 5000 architecture) | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Speed Grade | -25 (25 ns) | — |
| Paket | JLCC-84 (ceramic J-lead chip carrier) | — |
| Tipe Mounting | Surface Mount | Surface Mount |
| Programmable Technology | UV-erasable / OTP (EPROM-based) | — |
| Programming Interface | JTAG / Altera programming hardware (legacy) | — |
| Suhu Kerja | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Tegangan Pemuat | 5 V (typical, MAX 5000) | — |
| I/O Standard | TTL-compatible | — |
| Configuration Memory | Non-volatile EPROM (on-chip) | UV-erasable / OTP EPROM |
| Manufacturer | Altera Corporation (now Intel PSG) | — |
| Status RoHS | Unknown (legacy ceramic package typically non-RoHS) | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 12 |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 64 |
| Propagation Delay (tPD) | — | 55 ns |
| Supply Voltage (VCC) | — | 5 V |
| Technology | — | CMOS EPROM (UV-erasable / OTP) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Global Clock Inputs | — | 1 |
| Package Type | — | 205-pin (M205A) |