EPM5192LC-35 vs EPM5192LC-1 Perbandingan

Perbandingan bersamaan detil EPM5192LC-35 dari Altera dan EPM5192LC-1 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5192LC-35 EPM5192LC-1
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series MAX 5000 —
Family MAX 5000 CPLD MAX 5000
Logic Elements / Macrocells 192 macrocells —
Pin-to-Pin Delay (tPD) 35 ns —
Speed Grade -35 -1
Programmable Type UV-Erasable / OTP (EPROM-based) —
Package Type JLCC (J-Lead Ceramic Chip Carrier) LDCC (Leaded Ceramic Chip Carrier), plastic windowless
Tipe Mounting Surface Mount —
Logic Voltage 5 V TTL-compatible I/O —
Suhu Kerja Commercial (0C to +70C) per LC suffix 0C to +70C (commercial)
Programming Method Altera legacy programmer (EPROM-based) —
Architecture LAB-based with Programmable Interconnect Array (PIA) —
I/O Standard TTL —
Status RoHS Non-compliant (ceramic hermetic package) Non-compliant (ceramic LDCC with Pb-bearing terminations)
Status Lingkungan Hidup Obsolete - last-time-buy stock only —
Datasheet Document Altera MAX 5000 family datasheet (per alldatasheet.com) —
Device Type — EPLD / CPLD
Macrocells — 192
Logic Gates — 3750 (typical usable)
Dedicated Inputs — 7
User I/O — 64
Jumlah Pin — 84
Propagation Delay — 25 ns
Frekuensi Bawah Maximum — 50 MHz
Tegangan Pemuat — 5 V nominal (4.75 V to 5.25 V)
Technology — CMOS, UV-erasable / OTP EPROM cell
Programmable Memory — EPROM (one-time or UV-erasable)

Spek dan Sumber

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