EPM5192LC-35 vs EPM5192LC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-35 sa pamamagitan ng Altera at EPM5192LC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC-35 | EPM5192LC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | MAX 5000 | — |
| Family | MAX 5000 CPLD | MAX 5000 |
| Logic Elements / Macrocells | 192 macrocells | — |
| Pin-to-Pin Delay (tPD) | 35 ns | — |
| Speed Grade | -35 | -1 |
| Programmable Type | UV-Erasable / OTP (EPROM-based) | — |
| Package Type | JLCC (J-Lead Ceramic Chip Carrier) | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Uri ng Pagpapasok | Surface Mount | — |
| Logic Voltage | 5 V TTL-compatible I/O | — |
| Temperature na Operasyon | Commercial (0C to +70C) per LC suffix | 0C to +70C (commercial) |
| Programming Method | Altera legacy programmer (EPROM-based) | — |
| Architecture | LAB-based with Programmable Interconnect Array (PIA) | — |
| I/O Standard | TTL | — |
| Tindminan RoHS | Non-compliant (ceramic hermetic package) | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| Katayuan ng Lifecycle | Obsolete - last-time-buy stock only | — |
| Datasheet Document | Altera MAX 5000 family datasheet (per alldatasheet.com) | — |
| Device Type | — | EPLD / CPLD |
| Macrocells | — | 192 |
| Logic Gates | — | 3750 (typical usable) |
| Dedicated Inputs | — | 7 |
| User I/O | — | 64 |
| Bilang ng Pins | — | 84 |
| Propagation Delay | — | 25 ns |
| Maksimum na Taktiko ng Oras | — | 50 MHz |
| Volte ng Pagbibigay | — | 5 V nominal (4.75 V to 5.25 V) |
| Technology | — | CMOS, UV-erasable / OTP EPROM cell |
| Programmable Memory | — | EPROM (one-time or UV-erasable) |