EPM5192LC-45 vs EPM5192LC-2N Perbandingan

Perbandingan bersamaan detil EPM5192LC-45 dari Altera dan EPM5192LC-2N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5192LC-45 EPM5192LC-2N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000
Series EPM5192 —
Macrocells 192 192
Logic Elements 192 macrocells 192 macrocells (PAL/GAL-style AND-OR array)
Maximum Operating Frequency 100 MHz —
Pin-to-Pin Delay (tPD) 45 ns —
Dedicated Inputs [DATA_NEEDED: dedicated input count] —
Programmable I/O Pins [DATA_NEEDED: I/O pin count] —
Configuration Memory UV-erasable EPROM / OTP —
Technology EPROM-based CMOS —
Package Type LCC (Leaded Ceramic Chip Carrier) with UV window LC (ceramic J-leaded, windowed UV-erasable package family)
Package Code LC —
Speed Grade -45 (45 ns tPD) -2 (tPD approximately 25 ns)
Suhu Kerja 0C to +70C (commercial) Commercial (0C to +70C) - inferred from speed-grade -2 designation
Tegangan Pemuat 5 V 5 V (typical)
Status RoHS [DATA_NEEDED: RoHS status] Compliant (per -N lead-free suffix)
Tipe Mounting Surface Mount (LCC) Surface Mount (LC package)
Datasheet Page Count 52 pages —
Flip-Flops — 192
Propagation Delay (typical) — 25 ns
Programmability — UV-erasable EPROM cell
Lead-Free — Yes (per -N suffix)
Architecture — Programmable Logic Array (PLA) with global PIA
Programming Interface — Altera programming hardware (MAX+PLUS II / ByteBlaster compatible)

Spek dan Sumber

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