EPM5192LC84 vs EPM5192LC Perbandingan
Perbandingan bersamaan detil EPM5192LC84 dari Altera dan EPM5192LC dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM5192LC84 | EPM5192LC |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 7000S |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | 55 ns (typical, commercial) |
| Process Technology | CMOS | CMOS, UV-erasable/OTP EPROM configuration |
| Programmability | OTP / UV-Erasable | — |
| Paket | LCC-84 (PQCC84, MS-018) | JLCC-68 (windowed ceramic, LC suffix) |
| Jumlah Pin | 84 | — |
| Tipe Mounting | Surface Mount (Socket-compatible) | Surface Mount |
| Suhu Kerja | [DATA_NEEDED: operating temperature range] | — |
| Tegangan Pemuat | [DATA_NEEDED: VCC range] | — |
| User I/O | [DATA_NEEDED: max user I/O count] | — |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | JTAG (ByteBlaster-compatible) |
| Status RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Level MSL | [DATA_NEEDED: MSL rating] | — |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Global Clock Inputs | — | 1 |
| Maximum Clock Frequency (fMAX) | — | 50 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA), fixed delay |
| Boundary-Scan Support | — | JTAG IEEE 1149.1 |
| Operating Temperature (commercial) | — | 0C to +70C |