EPM5192LC84 vs EPM5192LC 对比
详细并排对比 EPM5192LC84 出自 Altera 和 EPM5192LC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192LC84 | EPM5192LC |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $15.95 | $28.40 |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 7000S |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | 55 ns (typical, commercial) |
| Process Technology | CMOS | CMOS, UV-erasable/OTP EPROM configuration |
| Programmability | OTP / UV-Erasable | — |
| 封装 | LCC-84 (PQCC84, MS-018) | JLCC-68 (windowed ceramic, LC suffix) |
| 引脚数量 | 84 | — |
| 安装类型 | Surface Mount (Socket-compatible) | Surface Mount |
| 工作温度 | [DATA_NEEDED: operating temperature range] | — |
| 电源电压 | [DATA_NEEDED: VCC range] | — |
| User I/O | [DATA_NEEDED: max user I/O count] | — |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | JTAG (ByteBlaster-compatible) |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS status] |
| MSL 等级 | [DATA_NEEDED: MSL rating] | — |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Global Clock Inputs | — | 1 |
| Maximum Clock Frequency (fMAX) | — | 50 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA), fixed delay |
| Boundary-Scan Support | — | JTAG IEEE 1149.1 |
| Operating Temperature (commercial) | — | 0C to +70C |