EPM7160SLC84-15 vs EPM7160ELC84-12 Perbandingan
Perbandingan bersamaan detil EPM7160SLC84-15 dari Altera dan EPM7160ELC84-12 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera
EPM7160ELC84-12 ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EPM7160SLC84-15 | EPM7160ELC84-12 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Waktu Pembelian Terakhir |
| Family | MAX 7000 | — |
| Macrocells | 160 | — |
| Usable Gates | 3,200 | — |
| Maximum Propagation Delay | 15 ns | — |
| Maximum User I/O Pins | 64 | — |
| Supply Voltage (VCCINT/VCIO) | 4.75 V to 5.25 V (5 V nominal) | — |
| I/O Logic Level | Configurable 3.3 V or 5 V | — |
| Technology | CMOS, EEPROM configuration | — |
| Package Type | PLCC-84 (PQCC84, JEDEC S-PQCC-J84) | — |
| Terminal Pitch | 1.270 mm | — |
| Tipe Mounting | Surface Mount (PLCC socket or direct solder) | Surface Mount |
| Suhu Kerja | 0 C to 70 C | 0C to +70C (commercial) |
| Programming Interface | JTAG (IEEE 1149.1) in-system programmable | — |
| Status RoHS | Not RoHS compliant (contains lead, SnPb finish typical) | [DATA_NEEDED: RoHS status] |
| Lifecycle | Obsolete / last-time-buy (per Altera/Intel PDN) | — |
| Manufacturer | — | Altera (Intel PSG) |
| Series | — | MAX 7000 (MAX 7000E) |
| Programmable Type | — | EE PLD (EEPROM) |
| Number of Macrocells | — | 160 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of Usable Gates | — | 3,200 |
| Number of I/O (max) | — | 68 |
| Number of I/O (per package) | — | 64 |
| Propagation Delay tpd(1) max | — | 12 ns |
| Counter Frequency (max) | — | 90.9 MHz |
| Voltage Supply - Internal | — | 4.75 V to 5.25 V (5 V nominal) |
| Paket / Case | — | 84-LCC (J-Lead) |
| Supplier Device Package | — | 84-PLCC (29.31 x 29.31 mm) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |