EPM7160SLC84-15 vs EPM7160ELC84-12 比較
詳細並排比較 EPM7160SLC84-15 由 Altera 與 EPM7160ELC84-12 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7160SLC84-15 | EPM7160ELC84-12 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | MAX 7000 | — |
| Macrocells | 160 | — |
| Usable Gates | 3,200 | — |
| Maximum Propagation Delay | 15 ns | — |
| Maximum User I/O Pins | 64 | — |
| Supply Voltage (VCCINT/VCIO) | 4.75 V to 5.25 V (5 V nominal) | — |
| I/O Logic Level | Configurable 3.3 V or 5 V | — |
| Technology | CMOS, EEPROM configuration | — |
| Package Type | PLCC-84 (PQCC84, JEDEC S-PQCC-J84) | — |
| Terminal Pitch | 1.270 mm | — |
| 安裝類型 | Surface Mount (PLCC socket or direct solder) | Surface Mount |
| 工作溫度 | 0 C to 70 C | 0C to +70C (commercial) |
| Programming Interface | JTAG (IEEE 1149.1) in-system programmable | — |
| RoHS 狀態 | Not RoHS compliant (contains lead, SnPb finish typical) | [DATA_NEEDED: RoHS status] |
| Lifecycle | Obsolete / last-time-buy (per Altera/Intel PDN) | — |
| Manufacturer | — | Altera (Intel PSG) |
| Series | — | MAX 7000 (MAX 7000E) |
| Programmable Type | — | EE PLD (EEPROM) |
| Number of Macrocells | — | 160 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of Usable Gates | — | 3,200 |
| Number of I/O (max) | — | 68 |
| Number of I/O (per package) | — | 64 |
| Propagation Delay tpd(1) max | — | 12 ns |
| Counter Frequency (max) | — | 90.9 MHz |
| Voltage Supply - Internal | — | 4.75 V to 5.25 V (5 V nominal) |
| 封裝 / 外殼 | — | 84-LCC (J-Lead) |
| Supplier Device Package | — | 84-PLCC (29.31 x 29.31 mm) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |