EPM9320RC208-10 vs EPM9320RC208-20N Perbandingan
Perbandingan bersamaan detil EPM9320RC208-10 dari Altera dan EPM9320RC208-20N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM9320RC208-10 | EPM9320RC208-20N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Paket | 208-pin RQFP (RC) | 208-pin RQFP (PowerQuad II) |
| Suhu Kerja | Commercial (0C to +70C) - 'C' suffix | [DATA_NEEDED: operating temperature range] |
| Tegangan Pemuat | 5 V | 5.0 V |
| Speed Grade | -10 | — |
| Programming Interface | JTAG (ByteBlaster/BitBlaster) | — |
| Non-volatile Configuration | Yes (EPROM/EEPROM based) | — |
| Design Tool Support | MAX+PLUS II, Quartus (legacy) | — |
| Status RoHS | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS status] |
| Tingkat Sensitivitas Kekeringan (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Device Family | — | MAX 9000 |
| Logic Type | — | Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 320 |
| Logic Array Blocks | — | 20 |
| Maximum Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| User I/O Pins | — | 168 |
| Tipe Mounting | — | Surface Mount |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| Level MSL | — | [DATA_NEEDED: MSL level] |