EPM9320RC208-20 vs EPM9320ARC208-10N Perbandingan

Perbandingan bersamaan detil EPM9320RC208-20 dari Altera dan EPM9320ARC208-10N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM9320RC208-20 EPM9320ARC208-10N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 320 —
Logic Array Blocks (LABs) 20 16
Usable Gates 6,000 —
Maximum I/O Pins 132 —
Propagation Delay (tPD max) 20 ns —
Supply Voltage (VCCINT) 4.75 V to 5.25 V —
Programming Technology EEPROM, in-system programmable (ISP) —
Boundary-Scan Interface IEEE Std. 1149.1 (JTAG) —
Suhu Kerja 0 °C to 70 °C (commercial) 0C to +70C (Commercial)
Paket 208-RQFP, exposed pad (208-BFQFP) 208-pin RQFP (BFQFP with exposed pad)
Tipe Mounting Surface Mount Surface Mount
Architecture Multiple Array Matrix (MAX), 3rd generation —
Process Technology CMOS, 5.0 V EEPROM —
Reprogrammability Yes, unlimited ISP cycles —
Macro Cells — 320
Logic Gates — 6,000 gates
Propagation Delay (tPD) — 10 ns
Maximum Frequency — 144.9 MHz
Supply Voltage (VCC) — 5 V
User I/O Pins — 168
Dedicated Input Pins — 12
Programming Interface — IEEE Std. 1149.1 JTAG
Configuration Memory — Non-volatile EEPROM
Status RoHS — Compliant (lead-free 'N' suffix)

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