EPM9560RC208-19 vs EPM9560RC208-18 Perbandingan

Perbandingan bersamaan detil EPM9560RC208-19 dari Altera dan EPM9560RC208-18 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPM9560RC208-18 EPM9560RC208-18 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-18 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-18 ✗ Akhir Hidup

Perbandingan Spesifikasi

Parameter Umum EPM9560RC208-19 EPM9560RC208-18
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Akhir Hidup
Device Family MAX 9000 MAX 9000 (EPM9560)
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 560 560 macrocells
Usable Gates 12,000 12,000 gates
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] —
Flip-Flops 772 772 flip-flops
User I/O Pins 149 —
Propagation Delay (tPD) 19 ns 18 ns (speed grade -18)
Maximum Frequency [DATA_NEEDED: fMAX] —
Supply Voltage (VCCINT) 5.0 V —
I/O Voltage Tolerance 3.3 V / 5 V —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Technology CMOS EEPROM CMOS
Paket RQFP-208 (208-pin PQFP) 208-pin RQFP (Power Quad Flat Pack)
JEDEC Package Code S-PQFP-G208 —
Suhu Kerja [DATA_NEEDED: operating temperature grade] [DATA_NEEDED: operating temperature range]
Tipe Mounting Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Logic Type — EEPROM-based Complex Programmable Logic Device (CPLD)
Maximum Operating Frequency — 117.6 MHz (family -15 grade reference)
Tegangan Pemuat — 5 V
I/O Voltage Compatibility — 3.3 V or 5 V
User I/O Lines — 149 I/O lines
Package JESD-30 Code — S-PQFP-G208
Configuration Memory — EEPROM (non-volatile, no external config PROM)
Status Lingkungan Hidup — EOL / mature (per Altera product discontinuance notice)

Spek dan Sumber

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