EPM9560RC208-19 vs EPM9560RC208-18 Comparison
Detailed side-by-side comparison of EPM9560RC208-19 by Altera and EPM9560RC208-18 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC208-19 | EPM9560RC208-18 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Eol |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.20 | $0.00 |
| Device Family | MAX 9000 | MAX 9000 (EPM9560) |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 560 | 560 macrocells |
| Usable Gates | 12,000 | 12,000 gates |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | β |
| Flip-Flops | 772 | 772 flip-flops |
| User I/O Pins | 149 | β |
| Propagation Delay (tPD) | 19 ns | 18 ns (speed grade -18) |
| Maximum Frequency | [DATA_NEEDED: fMAX] | β |
| Supply Voltage (VCCINT) | 5.0 V | β |
| I/O Voltage Tolerance | 3.3 V / 5 V | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | β |
| Technology | CMOS EEPROM | CMOS |
| Package | RQFP-208 (208-pin PQFP) | 208-pin RQFP (Power Quad Flat Pack) |
| JEDEC Package Code | S-PQFP-G208 | β |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Type | β | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Maximum Operating Frequency | β | 117.6 MHz (family -15 grade reference) |
| Supply Voltage | β | 5 V |
| I/O Voltage Compatibility | β | 3.3 V or 5 V |
| User I/O Lines | β | 149 I/O lines |
| Package JESD-30 Code | β | S-PQFP-G208 |
| Configuration Memory | β | EEPROM (non-volatile, no external config PROM) |
| Lifecycle Status | β | EOL / mature (per Altera product discontinuance notice) |