XC2C32A-6CP56C vs XC2C32A-4CP56C Perbandingan

Perbandingan bersamaan detil XC2C32A-6CP56C dari Xilinx dan XC2C32A-4CP56C dari AMD. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Xilinx
XC2C32A-6CP56C XC2C32A-6CP56C - 32-Macrocell 200MHz CPLD | Xilinx

XC2C32A-6CP56C - 32-Macrocell 200MHz CPLD | Xilinx

XC2C32A-6CP56C ✓ Aktif

Perbandingan Spesifikasi

Parameter Umum XC2C32A-6CP56C XC2C32A-4CP56C
Merek Xilinx AMD
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
Device Type CoolRunner-II complex programmable logic device (CPLD) CoolRunner-II complex programmable logic device
Macrocell Count 32 macrocells —
Logic Gate Count 750 gates —
User I/O Count 33 pins —
Logic Array Blocks 2 logic array blocks —
Maximum Operating Frequency 200 MHz —
Internal Frequency 450 MHz 450 MHz
Propagation Delay 4 ns 3.8 ns
Minimum Pin-to-Pin Logic Delay 3.0 ns —
Arus Memerintah 12 µA 12 µA minimum
Core Supply Voltage 1.8 V 1.8 V
Internal Supply Voltage Range 1.7 V to 1.9 V —
Process Technology 0.18 µm CMOS 0.18 µm CMOS
Logic Family CMOS CMOS
Paket CSP-56, 6 x 6 mm, 0.50 mm pitch 56-pin CSPBGA, 6 x 6 mm, 0.50 mm pitch
Total Package Pins 56 balls —
Tipe Mounting Surface mount —
Programming Support In-system programmable —
Rentang Suhu Kerja [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Status RoHS [DATA_NEEDED: RoHS status] Compliant
REACH Status [DATA_NEEDED: REACH status] —
Macrocells — 32 macrocells
Maximum Pin-to-Pin Logic Delay — 3.0 ns
User I/Os — 33 pins
Total Pins — 56 pins
Terminal Type — Ball
Package Shape — Square
Temperature Grade — Commercial
Lead-Free Status — Lead Free
Programming Interface — [DATA_NEEDED: programming interface details]

Spek dan Sumber

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