EP1810GM883 vs EP1810GI-45 比較
詳細な並列比較: EP1810GM883 メーカー: Altera および EP1810GI-45 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1810GM883 | EP1810GI-45 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $175.00 | $56.40 |
| Family | Classic EPLD (EP1810 series) | Altera Classic EPLD |
| Device Type | UV-Erasable Programmable Logic Device (EPLD) | UV Erasable Programmable Logic Device (EPLD) |
| Macrocells | 48 | 24 |
| Dedicated Inputs | 12 | — |
| User I/O Pins | 48 | — |
| Total Terminals | 68 | — |
| Global Clocks | 4 | — |
| Supply Voltage (Vcc) | 4.5 V to 5.5 V (nominal 5 V) | — |
| Propagation Delay (tpd) | 45 ns (max) | 45 ns |
| Maximum Toggle Frequency (fmax) | [DATA_NEEDED: fmax value not in source data; Classic EPLD family typical 35-80 MHz depending on grade] | — |
| Process Technology | CMOS, UV-erasable | — |
| パッケージ | 68-Pin Ceramic Pin Grid Array (PGA) | — |
| 動作温度 | -55C to +125C (MIL-STD-883 Class B) | [DATA_NEEDED: operating temperature range] |
| Screening | MIL-STD-883 Class B (suffix '883' denotes MIL processing) | — |
| 実装タイプ | Through-Hole (PGA socket) | Through-Hole |
| RoHS ステータス | [DATA_NEEDED: hermetic ceramic PGA is typically non-RoHS due to lead-bearing solder/finish; not confirmed in source data] | Non-compliant (ceramic PGA) |
| Lead-Free | [DATA_NEEDED: military 883B screened parts commonly use SnPb finish] | No |
| Flip-Flops | — | 48 |
| Speed Grade | — | -45 |
| Technology | — | CMOS |
| Package Type | — | Ceramic Pin Grid Array with UV window |
| ピン数 | — | 68 |
| Programmable | — | Yes (UV-erasable, electrically programmable) |
| 電源電圧 | — | [DATA_NEEDED: VCC range] |