EP1K100FI256-3 vs EP1K100FI256-2N 比較
詳細な並列比較: EP1K100FI256-3 メーカー: Intel および EP1K100FI256-2N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1K100FI256-3 | EP1K100FI256-2N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $52.90 | $55.80 |
| Family | ACEX 1K | ACEX 1K |
| Device Logic Elements | 4,992 | — |
| Typical Gate Count | 100,000 gates | — |
| Maximum RAM Bits | 49,152 bits | — |
| User I/O Pins | 186 | — |
| Dedicated Inputs | 6 | — |
| Speed Grade | -3 | -2 (faster bin) |
| Nominal Core Voltage | 2.5 V | — |
| Core Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | 0.22 micron CMOS | 0.22 µm CMOS |
| 動作温度範囲 | -40 C to +85 C (Industrial) | — |
| パッケージ | 256-ball FineLine BGA (FBGA-256) | 256-ball FineLine BGA (FBGA-256) |
| 実装タイプ | Surface Mount | Surface Mount |
| Configuration Method | SRAM-based, JTAG / PS / AS supported | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Non-compliant (leaded 'N' ball finish) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| AEC-Q100 Qualification | Not qualified | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | — |
| Series | — | EP1K100 |
| Logic Elements | — | 4,992 |
| System Gates | — | 100,000 |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Array Blocks (EABs) | — | 6 |
| Total RAM Bits | — | 49,152 |
| Maximum User I/O | — | 186 |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Ball Finish | — | Leaded (SnPb) - 'N' suffix |
| 動作温度 | — | -40 °C to +85 °C (Industrial) |
| Configuration Interface | — | JTAG (IEEE 1149.1) + serial modes |