EP1M350F780C5ES vs EP1M350F780C8 比較

詳細な並列比較: EP1M350F780C5ES メーカー: Altera および EP1M350F780C8 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

仕様比較

パラメータ EP1M350F780C5ES EP1M350F780C8
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 Obsolete Obsolete
在庫状況 In Stock In Stock
単価(USD) $142.00 $175.00
Family Mercury (EP1M) —
Logic Elements / Cells 14,400 —
Equivalent System Gates 350,000 —
Core Voltage (VCCINT) 1.71 V to 1.89 V (1.8 V nominal) —
Transceivers Integrated high-speed SERDES with CDR —
Transceiver Data Rate Up to 1.25 Gbps per channel —
I/O Voltage Banks Multiple, supporting mixed-voltage interfaces —
パッケージ 780-pin FC-FBGA (Flip-Chip BGA) 780-ball FineLine BGA
Package Dimensions 29 mm x 29 mm —
実装タイプ Surface Mount (BGA) Surface Mount (BGA)
動作温度 0C to +85C (commercial) 0C to +85C (commercial)
Architecture LUT-based with embedded CDR transceivers —
Compliance RoHS (per distributor listing; status: unknown) —
Lead-Free yes —
MSLレベル [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL rating]
Device Family — Altera APEX Mercury (EP1M)
Typical Gates — 350,000
Maximum Logic Elements (LEs) — 12,160
Embedded RAM Blocks — 4 dual-port RAM blocks
Speed Grade — C8 (commercial, speed bin 8)
Supply Voltage (Core) — [DATA_NEEDED: core Vcc]
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards)
Global Clock Networks — 8
Configuration Interface — IEEE 1532 / passive serial / JTAG
Maximum User I/O — [DATA_NEEDED: user I/O count]
In-System Programmability — Yes (ISP via JTAG)
RoHS ステータス — unknown (legacy device)

データシート&リソース

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