EP1S20F672I7 vs EP1S20B672C7N 比較
詳細な並列比較: EP1S20F672I7 メーカー: Intel および EP1S20B672C7N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S20F672I7 | EP1S20B672C7N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $199.50 | $320.00 |
| Family | Stratix (first generation) | Stratix (original) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Maximum RAM Bits | 1,669,248 | — |
| DSP Blocks | [DATA_NEEDED: exact DSP block count] | — |
| Maximum User I/Os | 426 | — |
| Supply Voltage (VCCINT core) | 1.5 V | — |
| Logic Family | CMOS | CMOS |
| パッケージ | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch | — |
| 動作温度 | -40C to +85C (industrial grade, I7 suffix) | 0 °C to 85 °C (Commercial Extended) |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Number of Pins / Balls | 672 | 672 |
| 実装タイプ | Surface Mount (BGA) | Surface Mount (BGA) |
| Clock Management PLLs | [DATA_NEEDED: PLL count] | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS compliance] |
| Lead-Free / Finish | SnPb (e0 per Partstack datasheet extract) | — |
| MSLレベル | unknown | 3 (per JEDEC J-STD-020) |
| Status | Last Time Buy (per distributor notices) | — |
| Series | — | Stratix |
| Process Technology | — | 0.13 µm CMOS |
| LABs / CLBs | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 bits |
| Maximum User I/O | — | 426 |
| Package Type | — | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | — | 1.5 V |
| Speed Grade | — | -7 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |