EP1S25F672C8N vs EP1S25F672C5N 比較
詳細な並列比較: EP1S25F672C8N メーカー: Intel および EP1S25F672C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S25F672C8N | EP1S25F672C5N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $179.40 | $142.00 |
| Family | Stratix (EP1S) | Stratix |
| Logic Elements (LE) | 25,660 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V (nominal) |
| Embedded Memory | 1,944 Kbit (TriMatrix) | — |
| DSP Blocks | 12 (9-bit x 9-bit multipliers) | — |
| PLLs | 6 | — |
| Maximum User I/O | 426 | — |
| 動作温度 | 0 °C to 85 °C (commercial) | — |
| Speed Grade | C8 (-8) | C5 |
| Package Type | 672-ball FineLine BGA (FBGA) | FineLine BGA (FBGA) |
| Package Dimensions | 35 x 35 mm, 1.27 mm pitch | — |
| Logic Family | CMOS | — |
| Maximum Internal Frequency | 357.14 MHz | 500 MHz |
| Configuration | Passive Serial / Passive Parallel / JTAG / EPC device | — |
| RoHS ステータス | Compliant (lead-free N suffix) | Compliant |
| Origin | Altera (acquired by Intel, 2015) | — |
| Series | — | EP1S25 |
| Logic Elements (Cells) | — | 25,660 |
| Number of CLBs | — | 2,566 |
| Number of Logic Cells / Gates | — | [DATA_NEEDED: total system gates] |
| Number of I/O Pins | — | 473 user I/O |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Package Pin Count | — | 672 |
| Ball Pitch | — | 1.00 mm |
| 動作温度範囲 | — | 0 °C to +85 °C (commercial) |
| Lead-Free (Pb-Free) | — | Yes (suffix "N") |
| Configuration Method | — | SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel |
| 実装タイプ | — | Surface Mount (BGA) |