EP1S80B956C6AB vs EP1S80B956C6 比較
詳細な並列比較: EP1S80B956C6AB メーカー: Intel および EP1S80B956C6 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S80B956C6AB | EP1S80B956C6 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $142.00 | $1,000.00 |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 79,040 | — |
| Logic Cells | 79,040 | — |
| Process Technology | 130 nm | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 450.05 MHz | — |
| User I/O Pins | 683 | — |
| パッケージ | 956-ball FCBGA | 956-BBGA, FCBGA, 40x40 mm |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS compliance status] |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0C to 85C (TJ, commercial) |
| Memory Blocks | TriMatrix embedded RAM | — |
| DSP Blocks | Embedded DSP blocks (per Stratix family) | 22 |
| PLLs | Multiple PLLs for clock management | — |
| Configuration Method | SRAM-based, configured via JTAG or passive/active serial | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements (LE) | — | 79,040 |
| Logic Array Blocks (LAB) | — | 7,904 |
| Total Memory Bits | — | 7,427,520 (TriMatrix: M512 + M4K + M-RAM) |
| Embedded Memory | — | 6.336 Mbit |
| Maximum User I/O | — | 683 |
| Supply Voltage - Core | — | 1.425 V to 1.575 V |
| Speed Grade | — | -6 |
| Maximum Transceiver Rate | — | [DATA_NEEDED: high-speed transceiver data rate, GHz] |