EP1S80B956C6AB vs EP1S80B956C6 Comparison
Detailed side-by-side comparison of EP1S80B956C6AB by Intel and EP1S80B956C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S80B956C6AB | EP1S80B956C6 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $142.00 | $1,000.00 |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 79,040 | β |
| Logic Cells | 79,040 | β |
| Process Technology | 130 nm | 130 nm CMOS |
| Core Voltage | 1.5 V | β |
| Maximum Operating Frequency | 450.05 MHz | β |
| User I/O Pins | 683 | β |
| Package | 956-ball FCBGA | 956-BBGA, FCBGA, 40x40 mm |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to 85C (TJ, commercial) |
| Memory Blocks | TriMatrix embedded RAM | β |
| DSP Blocks | Embedded DSP blocks (per Stratix family) | 22 |
| PLLs | Multiple PLLs for clock management | β |
| Configuration Method | SRAM-based, configured via JTAG or passive/active serial | β |
| Manufacturer | Intel (formerly Altera) | β |
| Logic Elements (LE) | β | 79,040 |
| Logic Array Blocks (LAB) | β | 7,904 |
| Total Memory Bits | β | 7,427,520 (TriMatrix: M512 + M4K + M-RAM) |
| Embedded Memory | β | 6.336 Mbit |
| Maximum User I/O | β | 683 |
| Supply Voltage - Core | β | 1.425 V to 1.575 V |
| Speed Grade | β | -6 |
| Maximum Transceiver Rate | β | [DATA_NEEDED: high-speed transceiver data rate, GHz] |