EP1SGX25FG672C7 vs EP1SGX25FG1020C4 比較
詳細な並列比較: EP1SGX25FG672C7 メーカー: Altera および EP1SGX25FG1020C4 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1SGX25FG672C7 | EP1SGX25FG1020C4 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $118.00 | $195.00 |
| Family | Stratix GX | Stratix GX |
| Series | Stratix | — |
| Logic Elements (LE) | 25,660 | — |
| Total RAM Bits | 1,944,576 bits | — |
| User I/O Pins | 455 | — |
| Embedded Transceivers | Yes (multi-gigabit, up to 3.125 Gbps) | 4 channels |
| Number of Transceivers | [DATA_NEEDED: exact transceiver count] | — |
| PLLs | 4 | — |
| Global Clocks | 16 | — |
| パッケージ | 672-pin FineLine BGA (FG672) | 1020-pin FineLine BGA (FBGA), 1.27 mm pitch |
| 動作温度 | 0C to +85C (commercial, speed grade C7) | 0 °C to +85 °C (commercial) |
| Core Voltage | 1.5 V | 1.5 V (typical) |
| Process Technology | 0.13 micron | 0.13 µm CMOS, SRAM-based |
| 実装タイプ | Surface Mount | — |
| Speed Grade | 7 (commercial) | C4 |
| Configuration Method | SRAM-based, JTAG/AS/PS supported | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm via manufacturer product page] |
| ライフサイクル状態 | Obsolete (per Altera/Intel product discontinuance notices) | Obsolete / Last-time-buy from authorized distributors |
| Logic Elements | — | 25,560 LE |
| Embedded Memory | — | 1,920 Kbits |
| Total RAM Blocks | — | M-RAM + M4K blocks (per Stratix GX architecture) |
| DSP Blocks | — | 10 (DSP blocks) |
| Maximum User I/O Pins | — | [DATA_NEEDED: exact pin count from datasheet] |
| Transceiver Data Rate | — | 600 Mbps to 3.125 Gbps |
| Configuration Modes | — | PS, PPS, PPA, JTAG |
| Configuration Device Required | — | Yes — external (EPC16 / EPCS recommended) |