EP2A25B652C8 vs EP2A25F672C7N 比較

詳細な並列比較: EP2A25B652C8 メーカー: Altera および EP2A25F672C7N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

Altera
EP2A25B652C8 EP2A25B652C8 - Altera APEX II FPGA, 25K LE, BGA-652 | Intel FPGA

EP2A25B652C8 - Altera APEX II FPGA, 25K LE, BGA-652 | Intel FPGA

EP2A25B652C8 ⚠ ラストタイムバイ

仕様比較

パラメータ EP2A25B652C8 EP2A25F672C7N
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 ラストバイ Obsolete
在庫状況 In Stock In Stock
単価(USD) $198.00 $195.00
Series APEX II —
Family APEX II (EP2A25) APEX II
Logic Elements [DATA_NEEDED: exact LE count, ~16K-25K typical for EP2A25] 24,320 cells
Maximum User I/O Pins [DATA_NEEDED: per datasheet - approximate 380-420 for BGA-652] —
パッケージ BGA-652 (FineLine BGA) —
Pin/Ball Count 652 —
Speed Grade -8 —
動作温度 0C to +85C (Commercial) 0 °C to 85 °C (commercial)
Process Technology 0.15-micron CMOS 0.15 µm all-layer copper (up to 8 metal layers)
Embedded Memory Embedded System Blocks (ESBs) - dual-port RAM, ROM, CAM Embedded System Blocks (ESB) configurable as dual-port RAM/ROM
PLLs [DATA_NEEDED: number, typically 4 for APEX II] Up to 4
Hardware Multipliers Yes (dedicated DSP blocks) —
LVDS Support Yes (multi-gigabit LVDS pairs) —
Configuration Modes Passive Serial, Passive Parallel, JTAG —
I/O Standards LVTTL, LVCMOS, SSTL, HSTL —
実装タイプ Surface Mount (BGA) Surface Mount
RoHS ステータス [DATA_NEEDED: per datasheet label, most APEX II BGA parts are lead-free but non-RoHS] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: per datasheet] —
System Gates — Approximately 900,000
User I/Os — 492
Propagation Delay (tPD) — 1.69 ns
Internal Operating Frequency — Up to 500 MHz
Core Voltage (VCCINT) — 1.5 V
Logic Family — CMOS
Package Type — 672-ball FC-FBGA (FineLine BGA)
Package Body Size — 27 x 27 mm
Ball Pitch — 1.0 mm
High-Speed I/O Support — True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps
Programmable Logic Type — Loadable PLD (in-system programmable)

データシート&リソース

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