EP2S60F672C5 vs EP2S60F672C3 比較
詳細な並列比較: EP2S60F672C5 メーカー: Intel および EP2S60F672C3 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2S60F672C5 | EP2S60F672C3 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $410.85 | $1,033.14 |
| Family | Stratix II | Stratix II |
| Device Family | Stratix II FPGA | — |
| Logic Elements | 60,440 | 60,440 |
| Configurable Logic Blocks (CLBs) | 24,176 | — |
| Total RAM Bits | 2,544,192 bits | 2,544,192 |
| Maximum User I/Os | 492 | — |
| Operating Frequency | Up to 609.76 MHz | — |
| Core Voltage | 1.2 V | 1.2 V |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| パッケージ | 672-ball FC-FBGA (35 × 35 mm, 1 mm pitch) | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch |
| 実装タイプ | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C5 suffix) | — |
| 動作温度範囲 | 0°C to +85°C | — |
| Number of PLLs | 4 | — |
| DSP Blocks | 12 (dedicated 18 × 18 multipliers) | [DATA_NEEDED: DSP block count] |
| I/O Standards | LVDS, LVTTL, SSTL, HSTL, PCI-X | — |
| Configuration Scheme | Fast Passive Parallel, JTAG, Active Serial | — |
| RoHS ステータス | Non-RoHS (legacy product, pre-RoHS production runs) | [DATA_NEEDED: RoHS status] |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded Multiplier Blocks | — | [DATA_NEEDED: 9x9 multiplier count] |
| User I/Os | — | 492 |
| PLLs | — | 4 |
| Global Clocks | — | [DATA_NEEDED: global clock count] |
| Speed Grade | — | C3 |
| Configuration Modes | — | PS, PPS, PPA, FPP, JTAG |
| 動作温度 | — | 0C to +85C (commercial) |
| MSLレベル | — | [DATA_NEEDED: MSL level] |