EP3SE260H780C3N vs EP3SE260H780C2N 比較
詳細な並列比較: EP3SE260H780C3N メーカー: Intel および EP3SE260H780C2N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP3SE260H780C3N | EP3SE260H780C2N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $1,325.00 | $3,600.00 |
| Series | Stratix® III E | Stratix III E |
| Logic Elements (LE) | 255,000 | — |
| Embedded Memory (bits) | 16,672,768 | — |
| Number of LABs/CLBs | 10,200 | — |
| User I/Os | 488 | — |
| Number of Pins / Balls | 780 | — |
| パッケージ | 780-BBGA, FCBGA (H780) | 780-BGA FCBGA |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | 0 °C to +85 °C (C grade, commercial) | — |
| Process Technology | 40 nm CMOS | — |
| Maximum Core Frequency | [DATA_NEEDED: maximum core frequency MHz] | — |
| Supply Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal V] | — |
| Transceivers | [DATA_NEEDED: number of embedded transceivers and max data rate] | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks and precision] | — |
| RoHS ステータス | Compliant (lead-free 'N' suffix) | [DATA_NEEDED: rohs status] |
| 湿気感度レベル（MSL） | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| Configuration Method | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel | — |
| Design Toolchain | Altera Quartus II (legacy); Intel Quartus Prime | — |
| Logic Elements | — | 255,000 |
| LABs / CLBs | — | 10,200 |
| Total RAM Bits | — | 16,672,768 |
| User I/O Count | — | 488 |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Core Voltage | — | 0.9 V |
| 動作温度範囲 | — | Commercial (0C to +85C) |
| Speed Grade | — | C2 |
| MSLレベル | — | 3 (168 hours) |
| Reflow Peak Time Max | — | 40 s |
| Lead-Free | — | [DATA_NEEDED: lead-free] |
| Package Code | — | BGA |
| Terminal Form | — | Ball |
| Number of Terminals | — | 780 |
| Process Node | — | 40 nm |