EP3SE260H780C3N vs EP3SE260H780C2N 비교
다음의 상세 나란히 비교: EP3SE260H780C3N 제조: Intel 및 EP3SE260H780C2N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP3SE260H780C3N | EP3SE260H780C2N |
|---|---|---|
| 브랜드 | Intel | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 최종 구매 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $1,325.00 | $3,600.00 |
| Series | Stratix® III E | Stratix III E |
| Logic Elements (LE) | 255,000 | — |
| Embedded Memory (bits) | 16,672,768 | — |
| Number of LABs/CLBs | 10,200 | — |
| User I/Os | 488 | — |
| Number of Pins / Balls | 780 | — |
| 패키지 | 780-BBGA, FCBGA (H780) | 780-BGA FCBGA |
| 실장 유형 | Surface Mount | Surface Mount |
| 동작 온도 | 0 °C to +85 °C (C grade, commercial) | — |
| Process Technology | 40 nm CMOS | — |
| Maximum Core Frequency | [DATA_NEEDED: maximum core frequency MHz] | — |
| Supply Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal V] | — |
| Transceivers | [DATA_NEEDED: number of embedded transceivers and max data rate] | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks and precision] | — |
| RoHS 상태 | Compliant (lead-free 'N' suffix) | [DATA_NEEDED: rohs status] |
| 습도 민감도 레벨 (MSL) | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| Configuration Method | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel | — |
| Design Toolchain | Altera Quartus II (legacy); Intel Quartus Prime | — |
| Logic Elements | — | 255,000 |
| LABs / CLBs | — | 10,200 |
| Total RAM Bits | — | 16,672,768 |
| User I/O Count | — | 488 |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Core Voltage | — | 0.9 V |
| 동작 온도 범위 | — | Commercial (0C to +85C) |
| Speed Grade | — | C2 |
| MSL 레벨 | — | 3 (168 hours) |
| Reflow Peak Time Max | — | 40 s |
| Lead-Free | — | [DATA_NEEDED: lead-free] |
| Package Code | — | BGA |
| Terminal Form | — | Ball |
| Number of Terminals | — | 780 |
| Process Node | — | 40 nm |