EP610DI-25 vs EP610DC-10 比較
詳細な並列比較: EP610DI-25 メーカー: Intel および EP610DC-10 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610DI-25 | EP610DC-10 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $7.95 |
| Part Family | Classic EPLD | — |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Pipelined Clock Frequency | 100 MHz (max fCNT, per family datasheet) | — |
| I/O Pins | 16 (bidirectional) | [DATA_NEEDED: exact I/O count for CDIP-24 variant] |
| Dedicated Inputs | 4 | — |
| Total User I/O | 20 | — |
| Technology | CMOS EPROM (UV-erasable) | CMOS, EPROM-based (UV-erasable) |
| Supply Voltage (VCC) | 5 V nominal | — |
| Package Type | Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 | — |
| ピン数 | 24 | — |
| 実装タイプ | Through-Hole (DIP) | Through-Hole |
| 動作温度 | Industrial (per "I" suffix) | 0C to +70C (commercial) |
| Speed Grade Suffix | 25 = 25 ns | — |
| Compliance | RoHS status unknown (legacy 1990s part) | — |
| Device Family | — | Altera Classic EPLD |
| Maximum Pipelined Data Rate | — | 100 MHz |
| Pin-to-Pin Propagation Delay (tpd) | — | 10 ns |
| Speed Grade | — | -10 |
| パッケージ | — | 24-pin CDIP (Ceramic DIP, windowed) |
| 電源電圧 | — | 5 V (single supply) |
| Logic Elements | — | 16 macrocells (programmable AND/OR array) |
| Configuration Memory | — | UV-erasable EPROM |
| Reprogrammable | — | Yes (UV erase window on package) |
| RoHS ステータス | — | [DATA_NEEDED: not stated in verified web data] |