EP610DI-35 vs EP610DC35 比較
詳細な並列比較: EP610DI-35 メーカー: Intel および EP610DC35 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 Obsolete仕様比較
| パラメータ | EP610DI-35 | EP610DC35 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.85 | $19.20 |
| Family | Altera Classic EPLD | Classic EPLD |
| Series | EP610 | — |
| Logic Cells / Macrocells | 16 macrocells | — |
| Usable Gates | 300 | 300 |
| Product Terms | 160 | — |
| I/O Pins | 16 bidirectional | [DATA_NEEDED: number of user I/O pins] |
| Total Inputs | 20 (including 4 dedicated inputs) | — |
| Propagation Delay (tpd) | 35 ns | — |
| Maximum Toggle Frequency | 28.6 MHz | — |
| Internal Pipelined Data Rate | Up to 100 MHz | — |
| 電源電圧 | 5 V | 5 V |
| Technology | CMOS, UV-erasable | UV-erasable CMOS EPROM |
| パッケージ | 24-pin CDIP (Ceramic DIP) | 24-pin CDIP (Ceramic DIP) with quartz erase window |
| 実装タイプ | Through-hole | Through-Hole |
| 動作温度 | [DATA_NEEDED: industrial/commercial grade range] | [DATA_NEEDED: operating temperature range] |
| RoHS ステータス | [DATA_NEEDED: not confirmed in supplied web data] | [DATA_NEEDED: RoHS status] |
| Logic Elements | — | 16 macrocells |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Frequency | — | 28.6 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| ピン数 | — | 24 |
| Programming Method | — | Altera legacy programmer (PLDLMax or compatible) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |