EP610DI-35 vs EP610DC35 对比
详细并排对比 EP610DI-35 出自 Intel 和 EP610DC35 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 Obsolete规格对比
| 参数 | EP610DI-35 | EP610DC35 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.85 | $19.20 |
| Family | Altera Classic EPLD | Classic EPLD |
| Series | EP610 | — |
| Logic Cells / Macrocells | 16 macrocells | — |
| Usable Gates | 300 | 300 |
| Product Terms | 160 | — |
| I/O Pins | 16 bidirectional | [DATA_NEEDED: number of user I/O pins] |
| Total Inputs | 20 (including 4 dedicated inputs) | — |
| Propagation Delay (tpd) | 35 ns | — |
| Maximum Toggle Frequency | 28.6 MHz | — |
| Internal Pipelined Data Rate | Up to 100 MHz | — |
| 电源电压 | 5 V | 5 V |
| Technology | CMOS, UV-erasable | UV-erasable CMOS EPROM |
| 封装 | 24-pin CDIP (Ceramic DIP) | 24-pin CDIP (Ceramic DIP) with quartz erase window |
| 安装类型 | Through-hole | Through-Hole |
| 工作温度 | [DATA_NEEDED: industrial/commercial grade range] | [DATA_NEEDED: operating temperature range] |
| RoHS 状态 | [DATA_NEEDED: not confirmed in supplied web data] | [DATA_NEEDED: RoHS status] |
| Logic Elements | — | 16 macrocells |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Frequency | — | 28.6 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| 引脚数量 | — | 24 |
| Programming Method | — | Altera legacy programmer (PLDLMax or compatible) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |