EP610LC-25 vs EP610ILC-10 比較
詳細な並列比較: EP610LC-25 メーカー: Intel および EP610ILC-10 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610LC-25 | EP610ILC-10 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $6.20 | $7.20 |
| Product Type | EPLD (Erasable Programmable Logic Device) | UV-Erasable / OTP PLD |
| Family | Classic EPLD | — |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| 電源電圧 | 5 V ±5% | 5 V (single supply) |
| Technology | CMOS | — |
| Programmability | UV-erasable (windowed package) | — |
| パッケージ | PLCC-28 | PLCC-28 (plastic J-lead chip carrier) |
| 動作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| 実装タイプ | Surface Mount | Surface Mount (PLCC socket or solder) |
| I/O Pins | [DATA_NEEDED: exact I/O count] | 16 |
| RoHS ステータス | [DATA_NEEDED] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | Classic EPLD |
| Architecture | — | PAL-type with macrocells |
| Usable Gates | — | 300 |
| Product Terms | — | 160 |
| Dedicated Inputs | — | 4 |
| Pin-to-Pin Delay (tPD) | — | 10 ns (grade -10) |
| Counter Frequency (fCNT) | — | 100 MHz |
| Logic Family Compatibility | — | TTL (5 V CMOS/TTL-compatible I/O) |