EP610SC-20 vs EP610SC-15 比較

詳細な並列比較: EP610SC-20 メーカー: Rochester Electronics および EP610SC-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

Rochester Electronics
EP610SC-20 EP610SC-20 - 16-Macrocell Classic EPLD, 22ns, 5V, SOIC-24

EP610SC-20 - 16-Macrocell Classic EPLD, 22ns, 5V, SOIC-24

EP610SC-20 ✓ 生産中

仕様比較

パラメータ EP610SC-20 EP610SC-15
ブランド Rochester Electronics Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 有効 Obsolete
在庫状況 In Stock In Stock
単価(USD) $17.50 $11.00
Product Type EPLD (Erasable Programmable Logic Device) —
Family Altera Classic EP610 —
Macrocells 16 —
Gate Equivalent 300 gates —
Propagation Delay (tPD) 22 ns 15 ns
Pipelined Data Rate up to 100 MHz —
Supply Voltage (VCC) 5 V 4.75 V to 5.25 V (5 V typical)
Technology CMOS with EPROM configuration —
パッケージ 24-pin SOIC (PDSO24) —
実装タイプ Surface Mount —
動作温度 Commercial (0C to +70C) [DATA_NEEDED: industrial/military grade availability] 0 °C to +70 °C (commercial)
Logic Levels 5V CMOS —
I/O Count [DATA_NEEDED: usable I/O count per datasheet pinout] —
Configuration Memory EPROM (UV-erasable in windowed variants, OTP in plastic) —
RoHS ステータス [DATA_NEEDED: confirm via Rochester product page] —
Manufacturer Rochester Electronics (authorized source for original Altera design) —
Product Family — Altera Classic EPLD
Number of Macrocells — 16
Usable Gates — 300
Maximum Operating Frequency (fMAX) — 83.3 MHz (typical)
Number of I/O Pins — 24 (package-limited)
Package Type — 24-pin SOP (SOIC-24, 300-mil)
Programmable Type — EPLD (EPROM-based, OTP for SC package)
Process Technology — CMOS
Architecture — Sum-of-products AND/OR with macrocell flip-flop
Programming Method — EPROM programmer (standard EPROM algorithm)
Lead-Free / RoHS — non-compliant (legacy Altera Classic family)
Erasability — One-time programmable for plastic SC package; ceramic windowed variants (LC/DM) are UV-erasable
Manufacturer Status — Discontinued; Rochester Electronics is the authorized lifecycle source

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