EP910DC-35 vs EP910DI-35 比較

詳細な並列比較: EP910DC-35 メーカー: Altera および EP910DI-35 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

仕様比較

パラメータ EP910DC-35 EP910DI-35
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 Obsolete 有効
在庫状況 In Stock In Stock
単価(USD) $10.95 $35.20
Device Type UV-Erasable CMOS PLD (PAL-type) —
Family Classic EPLD EP910 Altera Classic EPLD
Architecture PAL-type sum-of-products AND-OR array —
Usable Gates 900 gates 450
Macrocells 24 24
Product Terms 240 —
Dedicated Inputs 12 10
I/O Pins 24 —
Total Inputs 36 —
Propagation Delay (tpd) 35 ns —
最大クロック周波数 37 MHz (typical, internal) —
Supply Voltage (Vcc) 4.75 V to 5.25 V (5 V nominal) —
動作温度 0 °C to +70 °C (commercial) -40C to +85C (industrial)
パッケージ 40-pin CDIP (Ceramic DIP) with quartz window CDIP-40 (Ceramic DIP with UV window)
Lead Pitch 2.540 mm —
Termination Style Through-Hole —
Programming Method JEDEC fuse map via device programmer; UV erase EPROM programmer + JEDEC fuse map
Technology CMOS, UV-erasable EPROM cell CMOS, UV-erasable EPROM
RoHS ステータス Non-compliant (ceramic DIP with Pb-bearing lead finish) [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified]
Lifecycle Obsolete / last-time-buy from authorized distributors —
Product Type — EPLD (Erasable Programmable Logic Device)
Propagation Delay (tPD) — 35 ns
Maximum Toggle Frequency (fCNT) — 28.6 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Supply Current (ICC) — 40 mA typical
Bidirectional I/O Pins — 20
Total Pins — 40
実装タイプ — Through-Hole
Erasure Method — UV light through quartz window
Logic Family — PAL-type AND/OR array with D flip-flops
Manufacturer — Original Altera; long-term authorized by Rochester Electronics, LLC

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