EP910DC-35 vs EP910DI-35 Comparação
Comparação detalhada lado a lado de EP910DC-35 por Altera e EP910DI-35 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP910DC-35 | EP910DI-35 |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $10,95 | $35,20 |
| Device Type | UV-Erasable CMOS PLD (PAL-type) | — |
| Family | Classic EPLD EP910 | Altera Classic EPLD |
| Architecture | PAL-type sum-of-products AND-OR array | — |
| Usable Gates | 900 gates | 450 |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Dedicated Inputs | 12 | 10 |
| I/O Pins | 24 | — |
| Total Inputs | 36 | — |
| Propagation Delay (tpd) | 35 ns | — |
| Frequência máxima de clock | 37 MHz (typical, internal) | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V (5 V nominal) | — |
| Temperatura de operação | 0 °C to +70 °C (commercial) | -40C to +85C (industrial) |
| Encapsulamento | 40-pin CDIP (Ceramic DIP) with quartz window | CDIP-40 (Ceramic DIP with UV window) |
| Lead Pitch | 2.540 mm | — |
| Termination Style | Through-Hole | — |
| Programming Method | JEDEC fuse map via device programmer; UV erase | EPROM programmer + JEDEC fuse map |
| Technology | CMOS, UV-erasable EPROM cell | CMOS, UV-erasable EPROM |
| Status RoHS | Non-compliant (ceramic DIP with Pb-bearing lead finish) | [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified] |
| Lifecycle | Obsolete / last-time-buy from authorized distributors | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Toggle Frequency (fCNT) | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Supply Current (ICC) | — | 40 mA typical |
| Bidirectional I/O Pins | — | 20 |
| Total Pins | — | 40 |
| Tipo de montagem | — | Through-Hole |
| Erasure Method | — | UV light through quartz window |
| Logic Family | — | PAL-type AND/OR array with D flip-flops |
| Manufacturer | — | Original Altera; long-term authorized by Rochester Electronics, LLC |