EP910LC-35H vs EP910LC-35T 比較
詳細な並列比較: EP910LC-35H メーカー: Altera および EP910LC-35T メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910LC-35H | EP910LC-35T |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $25.00 | $28.90 |
| Family | Classic EPLD (EP910) | Classic EPLD (EP910) |
| Logic Elements | 24 macrocells | — |
| Equivalent Gates | 450 usable gates | — |
| Propagation Delay (tpd) | 35 ns | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V |
| Technology | CMOS, UV-erasable EPROM | — |
| パッケージ | 40-pin Ceramic DIP (H suffix) | PLCC-44 (J-lead) |
| User I/O Pins | 36 | 36 |
| Dedicated Inputs | 10 | — |
| 動作温度 | [DATA_NEEDED: operating temperature range grade] | 0C to +70C (commercial) |
| Erasure Method | UV (quartz window on H package) | UV-erasable window (ceramic package) / OTP (plastic) |
| Programming Method | Altera hardware programmer | — |
| Logic Levels | TTL compatible | — |
| 静止電流 | [DATA_NEEDED: typical ICC value] | — |
| Process Node | [DATA_NEEDED: process geometry] | — |
| 実装タイプ | Through-hole (Ceramic DIP) | Surface Mount (PLCC socket or solder) |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS status not in verified data] |
| Lifecycle | Obsolete (long-term supply via Rochester Electronics) | — |
| Logic Capacity | — | 450 usable gates |
| Macrocells | — | 24 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Operating Frequency | — | 28.6 MHz |
| Process Technology | — | CMOS (EPROM-based) |
| Programming | — | Altera programming hardware + MAX+PLUS II |
| MSLレベル | — | MSL 3 (168 hours) |