EPC1441TI32N vs EPC144TC32N 比較
詳細な並列比較: EPC1441TI32N メーカー: Intel および EPC144TC32N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPC144TC32N - Enhanced Configuration Device, 32-pin TQFP | Intel (Altera)
EPC144TC32N Obsolete仕様比較
| パラメータ | EPC1441TI32N | EPC144TC32N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | Memory ICs | FPGA & CPLD |
| ライフサイクル状態 | 有効 | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $5.45 | $3.85 |
| メモリタイプ | OTP Configuration PROM (serial) | — |
| Memory Density | 440 kbit (440,800 bits) | — |
| Number of Words | 440,800 words | — |
| Bits per Word | 1 bit | — |
| Memory Technology | EPROM (one-time programmable) | — |
| 電源電圧 | 3.3 V | — |
| インターフェースタイプ | Altera passive-serial (FPGA configuration) | — |
| Programming Interface | IEEE 1149.1 (JTAG) - 5 V and 3.3 V ISP | IEEE Std 1149.1 JTAG (TMS, TCK, TDI, TDO) |
| Max Serial Clock | 10 MHz (per datasheet.com) / 8 MHz (per Mouser listing) | — |
| Package Type | TQFP-32 (plastic, 7x7 mm) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Operating Temperature Grade | Industrial | — |
| ピン数 | 32 | — |
| RoHS ステータス | Compliant | — |
| Lead-Free | Yes | — |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Device Type | — | Enhanced Configuration (EPC) Device, serial EEPROM |
| Configuration Memory Size | — | 440800 bits (approximately 54 KB) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| Configuration Interface | — | Altera serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (typical 3.3 V) |
| Supply Voltage VPP | — | Generated internally (no external VPP required) |
| 動作温度 | — | -40C to +85C (industrial) |
| パッケージ | — | TQFP-32 |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| MSLレベル | — | [DATA_NEEDED: MSL level] |
| JTAG Chain Compatibility | — | Yes (shares TDI/TDO with target FPGA) |
| Programming Cycles | — | [DATA_NEEDED: endurance] |