EPM3512AFC256-10N vs EPM3512AFC256-20 比較
詳細な並列比較: EPM3512AFC256-10N メーカー: Altera および EPM3512AFC256-20 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM3512AFC256-20 - MAX 3000A CPLD, 512 Macrocells, BGA-256 | Altera
EPM3512AFC256-20 Obsolete仕様比較
| パラメータ | EPM3512AFC256-10N | EPM3512AFC256-20 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $43.22 | $9.75 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Usable Gates | 10000 | — |
| User I/O Pins | 208 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: number of LABs] | — |
| Operating Frequency (fMAX) | [DATA_NEEDED: fMAX MHz] | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Setup Time (tSU) | 4.5 ns | — |
| VCCINT (Core Supply) | 3.3 V | — |
| VCCIO (I/O Supply) | 3.3 V or 2.5 V | — |
| Technology | CMOS EEPROM-based, non-volatile | — |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| パッケージ | 256-ball FBGA (17 mm x 17 mm) | 256-ball FBGA (Fine-pitch BGA) |
| ISP Interface | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL moisture sensitivity level] |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Typical Usable Gates | — | 10,000 |
| Speed Grade | — | -20 (20 ns tPD) |
| ピン数 | — | 256 |
| Operating Voltage (VCCINT) | — | 3.3 V (3.0 V to 3.6 V) |
| I/O Voltage (VCCIO) | — | 2.5 V or 3.3 V (5.0 V tolerant inputs) |
| I/O Standards | — | LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant |
| Program Memory Type | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| JTAG Support | — | Yes (boundary-scan + ISP) |
| 動作温度 | — | [DATA_NEEDED: operating temperature range] |
| Configuration Memory | — | Internal EEPROM |