EPM5064JC vs EPM5064JI-1 比較
詳細な並列比較: EPM5064JC メーカー: Altera および EPM5064JI-1 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5064JC | EPM5064JI-1 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $7.10 | $3.40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable PLD) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 64 | 64 |
| Usable Gates | 1,250 (approx.) | — |
| Logic Array Inputs | 36 | — |
| Logic Array Outputs | 64 | — |
| パッケージ | 68-pin PLCC (JEDEC) | 68-pin PLCC (windowed ceramic) |
| 実装タイプ | Surface Mount (socketed) | Surface Mount |
| Supply Voltage (VCC) | 5 V (typical, 4.75 V - 5.25 V range) | — |
| I/O Logic Level | TTL / CMOS compatible | — |
| Configuration Memory | EPROM (UV-erasable window or OTP) | — |
| 動作温度 | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: commercial vs industrial grade temp range] |
| Pin-to-Pin Delay (tPD) | [DATA_NEEDED: specific tPD grade value] | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fCNT grade value] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: not stated in provided data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Programming Tool | Altera MAX+PLUS II / Quartus II (legacy device support) | — |
| User I/O Pins | — | [DATA_NEEDED: user I/O count from datasheet] |
| Logic Elements | — | [DATA_NEEDED: total logic elements] |
| Propagation Delay (tPD) | — | [DATA_NEEDED: combinational tPD from datasheet] |
| 電源電圧 | — | 5 V |
| Process Technology | — | CMOS, UV-erasable |
| Speed Grade | — | JI-1 (commercial, -10/-12/-15 family) |
| Programmability | — | UV-erasable (windowed package) |
| Data Retention | — | 25 years (per MAX 5000 datasheet) |