EPM5128JC vs EPM5064JC 比較
詳細な並列比較: EPM5128JC メーカー: Altera および EPM5064JC メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5128JC | EPM5064JC |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.75 | $7.10 |
| Product Family | MAX 5000 | — |
| Device Type | EPLD / CPLD | EPLD (Erasable PLD) |
| Macrocell Count | 128 | — |
| Propagation Delay (tPD) | 35 ns | — |
| Logic Elements | Programmable AND/OR/XOR array | — |
| Supply Voltage (VCC) | 5 V (typical) | 5 V (typical, 4.75 V - 5.25 V range) |
| ピン数 | 68 | — |
| Package Type | PLCC-68 (JLCC) ceramic, J-leaded | — |
| Dedicated Inputs | 8 | — |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Configuration Memory | UV-erasable EPROM (windowed package) | EPROM (UV-erasable window or OTP) |
| Programming Interface | Altera MAX+PLUS II / A+PLUS / legacy programmer | — |
| 動作温度 | Commercial 0C to +70C | [DATA_NEEDED: operating temperature grade] |
| 実装タイプ | Surface Mount (PLCC socket or solder) | Surface Mount (socketed) |
| Boundary Scan | JTAG IEEE 1149.1 (family feature) | — |
| Process Technology | CMOS EPROM | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status - legacy part] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Family | — | MAX 5000 |
| Macrocells | — | 64 |
| Usable Gates | — | 1,250 (approx.) |
| Logic Array Inputs | — | 36 |
| Logic Array Outputs | — | 64 |
| パッケージ | — | 68-pin PLCC (JEDEC) |
| I/O Logic Level | — | TTL / CMOS compatible |
| Pin-to-Pin Delay (tPD) | — | [DATA_NEEDED: specific tPD grade value] |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fCNT grade value] |
| MSLレベル | — | [DATA_NEEDED: MSL rating] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus II (legacy device support) |