EPM5128LC-1 vs EPM5128JC-2 比較
詳細な並列比較: EPM5128LC-1 メーカー: Altera および EPM5128JC-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5128LC-1 | EPM5128JC-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.20 | $21.75 |
| Family | MAX 5000 | MAX 5000 |
| Logic Elements / Macrocells | 128 macrocells | — |
| Number of Usable Gates | [DATA_NEEDED: usable gates] | — |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 52 | — |
| Total User I/O | 60 (max) | — |
| Propagation Delay (tpd) | 30 ns | — |
| Supply Voltage (VCC) | 5 V (±10%) | — |
| Process Technology | CMOS EPROM, UV-erasable | CMOS |
| Programmability | UV-erasable / OTP (windowed package) | — |
| Package Type | 68-pin J-lead ceramic chip carrier (PLCC windowed) | — |
| 動作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| 実装タイプ | Surface Mount (J-lead PLCC socket compatible) | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic windowed package contains lead-bearing solder) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | UV-Erasable Programmable Logic Device (PLD) |
| Macrocells | — | 128 |
| Propagation Delay (tPD) | — | 45 ns (max) |
| Maximum Counter Frequency (fCNT) | — | 50 MHz |
| Input Setup Time (tSU) | — | 7.5 ns |
| Output Drive Current (IOH/IOL) | — | 12 mA DC |
| パッケージ | — | 68-pin CQCC (Ceramic Quad Flat Pack), windowed |
| 電源電圧 | — | 5 V (nominal) |
| Program/Erase Method | — | UV (ceramic window) |
| Erase/Program Cycles | — | [DATA_NEEDED: minimum erase/program cycles] |
| Logic Family | — | TTL-compatible I/O |