EPM5130WC-1 vs EPM5130JC-1 比較
詳細な並列比較: EPM5130WC-1 メーカー: Intel および EPM5130JC-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM5130WC-1 - 128-Macrocell 40ns UV CPLD, 100-pin CQFP | Intel (Altera) MAX 5000
EPM5130WC-1 Obsolete
仕様比較
| パラメータ | EPM5130WC-1 | EPM5130JC-1 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $85.00 | $9.25 |
| Series | MAX 5000 | — |
| Manufacturer | Altera (now Intel) | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocell Count | 128 | — |
| Logic Array Blocks | Multiple LABs (per MAX 5000 architecture) | — |
| Propagation Delay (tpd) | 40 ns | — |
| 最大クロック周波数 | 50 MHz | — |
| Erasure Method | UV (ultraviolet, windowed package) | — |
| Process Technology | CMOS EPROM | CMOS |
| User I/O Pins | Up to 100 | — |
| Package Type | 100-pin Ceramic QFP (Windowed) | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| 電源電圧 | [DATA_NEEDED: VCC nominal] | — |
| Programmable | Yes (UV-erasable, non-volatile) | — |
| Logic Family | MAX 5000 (Altera) | — |
| Configuration Memory | EPROM (on-chip) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Family | — | MAX 5000 |
| Usable Gates | — | 2,500 gates |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Propagation Delay (tPD) | — | 40 ns |
| Supply Voltage (VCC) | — | 5 V |
| Dedicated Inputs | — | 19 |
| I/O Pins | — | 80 |
| パッケージ | — | 84-pin PLCC (J-lead) |
| Programming Technology | — | UV-erasable EPROM (quartz window) |
| External Clock Pins | — | 1 global clock |