EPM5130WC-1AA vs EPM5130WC-2 比較
詳細な並列比較: EPM5130WC-1AA メーカー: Altera および EPM5130WC-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5130WC-1AA | EPM5130WC-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $54.25 | $62.00 |
| Device Family | MAX 5000 | MAX 5000 |
| Macrocell Count | 128 | 128 |
| Number of Logic Array Blocks | 8 (typical for MAX 5130) | — |
| Propagation Delay (tPD, max) | 40 ns | — |
| Maximum Toggle Frequency (fCNT) | 50 MHz | — |
| Maximum Clock Frequency (fMAX) | [DATA_NEEDED: fMAX exact value] | — |
| Dedicated Inputs | 19 | 19 |
| I/O Pins | 48 | — |
| Total Inputs (incl. I/O feedback) | 68 | — |
| Total Outputs | 48 | — |
| Process Technology | 5 V CMOS, UV-erasable | CMOS |
| パッケージ | Windowed Ceramic WQFP (AA suffix) | — |
| 動作温度 | [DATA_NEEDED: commercial or industrial temp grade] | 0 °C to 70 °C (Commercial) |
| Supply Voltage (VCC) | 5 V nominal | 4.75 V to 5.25 V |
| Programming Method | UV erase + EPROM programming | — |
| RoHS ステータス | unknown (legacy package, likely non-compliant) | [DATA_NEEDED: RoHS status] |
| Logic-to-Pin Ratio | Highest in-class per Altera marketing literature | — |
| Product Type | — | UV-Erasable PLD (CPLD) |
| Propagation Delay (tPD) | — | 45 ns |
| User I/O Lines | — | 48 |
| Total Inputs (I/O + dedicated) | — | 68 |
| Package Type | — | 100-terminal Ceramic CQFP (R-CQFP-G100), windowed, gull-wing |
| Terminal Pitch | — | 0.650 mm |
| 実装タイプ | — | Surface Mount |
| Configuration Memory | — | UV-erasable CMOS EEPROM cells |
| Speed Grade | — | -2 (45 ns) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Logic Elements | — | AND/OR array with programmable macrocell register |