EPM5192GI84 vs EPM5192GC1 比較
詳細な並列比較: EPM5192GI84 メーカー: Altera および EPM5192GC1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192GI84 | EPM5192GC1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $19.80 | $24.50 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable / OTP Complex PLD (CPLD) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | — |
| Logic Array Blocks | [DATA_NEEDED: number of LABs] | — |
| パッケージ | 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) | — |
| Package Code | WPGA | — |
| Operating Voltage (VCC) | 5 V (typical) | — |
| I/O Logic Compatibility | TTL | — |
| Temperature Grade | Industrial | — |
| Programmable Flip-Flop Modes | D, T, JK, SR | — |
| Programmability | UV-erasable (windowed) / OTP | — |
| Programming File Format | JEDEC map via MAX+PLUS II / A+PLUS | — |
| Propagation Delay | [DATA_NEEDED: tPD in ns] | [DATA_NEEDED: tpd specification] |
| Max User I/O Pins | [DATA_NEEDED: usable I/O count for this package] | — |
| 動作温度範囲 | -40 C to +85 C (industrial) | — |
| 実装タイプ | Through-Hole (PGA socket or PCB pin/peg) | Through-hole (PGA) |
| RoHS ステータス | [DATA_NEEDED: most legacy PGA parts are non-RoHS] | unknown |
| Lead-Free | [DATA_NEEDED: legacy part, likely contains lead] | — |
| Number of Terminals | 84 | — |
| Terminal Form | PIN/PEG | — |
| Package Shape | SQUARE | — |
| Macro Cells | — | 192 |
| Usable Gates | — | 3,750 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Programming Technology | — | UV-Erasable / OTP EPROM |
| Package Type | — | Ceramic PGA (Pin Grid Array) |
| Logic Elements | — | 192 macrocells with AND/OR array |
| Process Technology | — | EPROM-based CMOS |
| 動作温度 | — | [DATA_NEEDED: operating temperature range] |
| ピン数 | — | [DATA_NEEDED: pin count for GC1 PGA package] |
| Development Tool | — | Altera MAX+PLUS II |